Computer Architecture

• Computer Architecture
  • Datapath
  • Instruction Set
  • Pipelining
• first ISA
  • Instruction format
  • Data type supported
  • Instruction list
• Cache Coherence and Memory Consistency
  • Cache coherence
  • Memory consistency
  • Reference
• ISA
  • 0. MIPS
  • 1. MVP ISA
  • 2. RISC-V ISA
  • 3. How to define a fused MVP ISA to compatible with RISC-V
• Register Renaming
  • Physical Register
  • Logical Register / Architecture Register
  • 物理寄存器如何映射到逻辑寄存器
• Groq
  • TSP芯片
  • TSP Superlane
• Hopper H100
  • SM Architecture
  • HMB3
  • Accelerating principles for performance
  • Accelerating deep learning
  • Transformer Engine
  • ThunderKittens
• AMD-7900xtx
• Cerebras Architecture